Exploring synergistic DVFS control of cores and DRAMs for thermal efficiency in CMPs with 3D-stacked DRAMs.

Journal

International Symposium on Low Power Electronics and Design (ISLPED), Beijing, China, September 4-6, 2013

Pages

304

Date Issued

2013

Author(s)

Lin, Ping-Sheng

Chen, Yi-Jung

Yang, Chia-Lin

DOI

URI

URL

Type

conference paper