Output Pulsating Current Reduction for Two-Phase Interleaved Boost Converters
Journal
2019 IEEE 4th International Future Energy Electronics Conference, IFEEC 2019
Date Issued
2019
Author(s)
Abstract
This paper proposes a method to reduce the output pulsating current of two interleaved boost converters to mitigate the voltage ripple at the output dc capacitor. It is very common that two boost converters are connected in parallel with interleaved operation. Most of the research topics focus on the interleaving control to reduce the inductor current ripple at the input terminal. However, for some particular applications, the impact of the output pulsating current should be considered. The pulsating output current will cause the voltage ripple at the output capacitor which will increase the equivalent series resistor power loss of the capacitor and reduce the lifetime. The interleaving operation can reduce the peak value of the output pulsating current but how to determine the optimal phase shift angle is not studied before. Because of the input voltage and power of two boost converters are different, the phase shift angle needs to be determined based on the operation conditions of the two interleaved boost converters. This paper proposes an approach to analyze the interleaved pulsating output currents and derives the equations to determine the phase shift angle for achieving the smallest peak output current so the capacitor voltage ripple can be reduced. The derived equation for phase shift angle calculation is simply and no extra circuitries or sensors are needed for hardware implementation. Computer simulation and hardware experimental results are presented to validate the proposed method.
SDGs
Type
conference paper