Research of CMOS Microwave and Millimeter-wave Power Amplifier
Date Issued
2008
Date
2008
Author(s)
Kuo, Jing-Lin
Abstract
The goal of the thesis is to design and implement three power amplifiers (PAs) in CMOS process. The thesis consists of three parts. The first part introduces the basic of power amplifier theory, then introduces the design consideration and the design challenge of the CMOS power amplifier. n the second part, the first PA is implemented in a standard 0.18-μm CMOS technology. The major challenge of this circuit is that the breakdown voltage is about 1.8 V. Proper design of matching networks leads to good power and gain performances. The measured output power is 19.1 dBm and the small signal gain is 18.8 dB at 24 GHz. The chip size is only 0.56 x 0.58 mm2. n the third part, two PAs are designed and measured for 60 GHz systems. Thin-film microstrip lines (TFMS) used as matching elements to reduce the effect of lossy substrate on these two circuits. The first PA fabricated in 0.13-μm CMOS process. This PA achieves a measurement Psat of 14.3 dBm, P1dB of 11.2 dBm, PAE of 8 %, and linear gain of 15.5 dB at the frequency of 55 GHz, with a chip size of 0.66 x 0.5 mm2, when VDD is biased at 3 V. The second PA fabricated in a more advanced 90-nm CMOS process. The circuit is designed to have a wide-band frequency response to tolerate process variation. The MMIC PA has a wide 3-dB bandwidth from 50 to 70 GHz, with a chip size of 0.66 x 0.5 mm2. When VDD is biased at 2.4 V, this PA achieves a measurement Psat of 16.2 dBm, P1dB of 12 dBm, PAE of 15 %, and linear gain of 33 dB at the frequency of 60 GHz.The simulations agree with the measurements very well in these PAs, also, three PAs demonstrated high output power compared with the previously works of CMOS PAs operating at frequencies around 24 GHz and 60 GHz.
Subjects
CMOS
PA
K band
V band
RF amplifier
Monolithic microwave integrated circuit (MMIC)
Type
thesis
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