Challenges and solutions in modern VLSI placement
Journal
2007 International Symposium on VLSI Design, Automation and Test
Date Issued
2007
Author(s)
Abstract
The VLSI placement problem is to place objects into a fixed die such that there are no overlaps among objects and some cost metric (e.g., wirelength, routability) is optimized. It is a major step in physical design that has been studied for decades. However, modern VLSI design challenges have reshaped the placement problem. A modern placer needs to handle large-scale designs with millions of objects, heterogeneous objects with very different sizes, and various complex placement constraints such as preplaced blocks and chip density. In this paper, we first introduce the major techniques employed in our placer for tackling the large-scale mixed-size designs and the aforementioned constraints, and then provide some future research directions for the modern placement problem.
Type
conference paper