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College of Electrical Engineering and Computer Science / 電機資訊學院
Computer Science and Information Engineering / 資訊工程學系
A hybrid DRAM/PCM buffer cache architecture for smartphones with QoS consideration
Details
A hybrid DRAM/PCM buffer cache architecture for smartphones with QoS consideration
Journal
ACM Transactions on Design Automation of Electronic Systems
Journal Volume
22
Journal Issue
2
Date Issued
2016
Author(s)
Lin, Y.-J.
Yang, C.-L.
Li, H.-P.
Wang, C.-Y.M.
CHIA-LIN YANG
DOI
10.1145/2979143
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/487728
URL
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85008936689&doi=10.1145%2f2979143&partnerID=40&md5=f7e07bafa1c776c982b2db4bfc8f103c
Type
journal article