Al2O3 High-k Gate Dielectrics Fabricated by Shadow Evaporation and Nitric Acid Oxidation under Low Temperature Process for MOS Devices
Date Issued
2009
Date
2009
Author(s)
Chen, Ching-Hang
Abstract
In this work, the electrical characteristics of Al2O3 high-k gate dielectric prepared under low thermal budget environment are investigated. Two approaches for preventing alloy spiking through effect are presented. Al2O3 gate dielectric was prepared by ultra-thin aluminum film with nitric acid (HNO3) oxidation, and followed by DAC-ANO compensation. The interfacial SiO2 was grown by anodization in D.I water. At first, we made two samples, one with once Al2O3 film fabrication, and the other with twice. The TEM picture reveals that the initial SiO2 grown under room-temperature by anodization failed to block the Aluminum atoms from spiking through. Results show that the sample with only once Al2O3 film fabrication could poorly reduce the leakage current. On the other hand, twice Al2O3 film fabrications made a big improvement in gate leakage current suppression, about ten orders difference in maximum value between the two samples. The C-V behaviors are satisfactory with good interfacial quality. It can be concluded that the Kirkendall effect was prohibited by the previous Al2O3 film, and the second Al2O3 film could grow successfully. Thus electrical properties were demonstrated to be good. Under high electric field, F-N tunneling dominates the charge behaviors, while P-F mechanism rules the low electric field leakage current. Second, a treatment of 380℃ annealing in N2 ambient for the initial SiO2 effectively remove hydrogen or some unwanted ions. The C-V and J-V curves comparison between the samples with and without post SiO2 anneal had demonstrated the necessity of the interfacial SiO2 refinement. The leakage current can be suppressed more about 2 to 3 orders with SiO2 anneal. The constant current stress method was used to examine the reliability. From the voltage fluctuation during constant current stress, electron trapping behavior reveals that the post SiO¬2 anneal could also reduce the interface traps.
Subjects
High-k gate dielectric
Low temperature process
Nitric acid oxidation
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-98-R96943060-1.pdf
Size
23.32 KB
Format
Adobe PDF
Checksum
(MD5):3ea5972ab14f356ee20752e4e57de7c2