An 833-MHz 132-Phase Multiphase Clock Generator with Self-Calibration Circuits
Journal
IEEE Aisan Solid-State Circuit Conference
Pages
437-440
Date Issued
2008-11
Author(s)
Shih-Chun Lin
Abstract
An 833-MHz 132-phase clock generator with self-calibrated circuits is presented. Two delay-locked loops (DLLs) are used to produce phases efficiently because the number of output phases is the product of the stage numbers of the two DLLs. A DLL calibration algorithm which uses the sequential comparison method is also proposed. Only one charge pump and one phase detector are needed in calibration circuits and all output signals go through the same path. Consequently, the effect of the mismatch of the devices can be avoided and the mismatch of the path can be eliminated. This multiphase clock generator with self-calibration circuits have been fabricated in a 0.13-μm CMOS technology, while dissipating 67.2 mW from a single 1.2-V power supply.
SDGs
Type
conference paper