A broadband balanced distributed frequency doubler with a sharing collector line
Journal
IEEE Microwave and Wireless Components Letters
Journal Volume
19
Journal Issue
2
Pages
110-112
Start Page
110
End Page
112
ISSN
15311309
Date Issued
2009
Author(s)
Abstract
A broadband balanced distributed frequency doubler fabricated by 0.35 μm SiGe BiCMOS technology is developed to operate from 4 to 18 GHz output frequency. This balanced doubler consists of an active balun and a distributed doubler. A sharing collector line is used in the balanced distributed doubler to reduce the chip size. This circuit exhibits a measured conversion loss of less than 8 dB and a fundamental rejection of better than 23 dB for the output frequency between 4 and 18 GHz. The chip size is 1.1× 0.7 mm 2.
Subjects
Balanced doubler
Distributed doubler
SiGe BiCMOS
SDGs
Type
journal article