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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Full-Chip Routing Considering Double-Via Insertion
Details
Full-Chip Routing Considering Double-Via Insertion
Resource
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27 (5): 844-857
Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Journal Volume
27
Journal Issue
5
Pages
844-857
Date Issued
2008
Date
2008
Author(s)
Chen, Huang-Yu
Chiang, Mei-Fang
Chang, Yao-Wen
Chen, Lumdo
Han, B.
URI
http://ntur.lib.ntu.edu.tw//handle/246246/141414
http://ntur.lib.ntu.edu.tw/bitstream/246246/141414/1/41.pdf
Type
journal article
File(s)
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Name
41.pdf
Size
1.67 MB
Format
Adobe PDF
Checksum
(MD5):dd994617eba356b1615b4736e04874ad
