A 1~16Gb/s wide-range clock/data recovery circuit with bidirectional frequency detector
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
58
Journal Issue
8
Pages
487-491
Date Issued
2011-08
Author(s)
Chang-Lin Hsieh
Abstract
A 1-16-Gb/s wide-range clock and data recovery (CDR) circuit is presented by using the proposed bidirectional frequency detector. This CDR circuit is fabricated in 0.13-μm CMOS technology, and its active area is 0.134 mm 2 without a loop filter. The power consumption of this CDR circuit is 160 mW for a supply of 1.5 V. A modified interpolation voltage-controlled oscillator is presented, which covers from 4.9 to 10.2 GHz. A quadrature divider is used to generate accurate quadrature clocks. © 2011 IEEE.
Subjects
Clock and data recovery (CDR); frequency detector (FD); quadrature divider; voltage-controlled oscillator (VCO); wide-range
Other Subjects
Circuit oscillations; Clocks; Oscillistors; Recovery; Timing circuits; Variable frequency oscillators; Voltage dividers; Active area; Clock and data recovery; CMOS technology; Frequency detectors; Loop filter; Quadrature clocks; quadrature divider; wide-range; Clock and data recovery circuits (CDR circuits)
Type
journal article