Low power and power aware fractional motion estimation of H.264/AVC for mobile applications
Resource
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Journal
IEEE International Symposium on Circuits and Systems, 2006. ISCAS
Pages
-
Date Issued
2006-05
Date
2006-05
Author(s)
DOI
N/A
Abstract
In this paper, the low power design techniques from algorithm to architecture levels are proposed for fractional motion estimation in H.264/AVC. The proposed AMPD algorithm can reduce 50.8% power with up to 0.1 dB quality drop. The proposed parallel architecture with efficient memory hierarchy can efficiently reuse data and save 61.6% power. Furthermore, the power aware functionality is included. Our design can gracefully vary the quality degradation of 0.1-3.9 dB in response to the 22.58-1.64 mW power consumption. This power-oriented design is very efficient for different mobile applications in various power situations.
SDGs
Type
journal article
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