A 5-bit 400-MS/s time domain flash ADC in 0.18-�gm CMOS
Journal
Analog Integrated Circuits and Signal Processing
Journal Volume
102
Journal Issue
2
Pages
369-378
Date Issued
2020
Author(s)
Lin, Y.-C.
Abstract
A 5-bit 400-MHz time-domain analog-to-digital converter (ADC) was implemented in 0.18-μm CMOS technology. The proposed design is composed of a voltage-to-time-difference converter, a flash-type time-to-digital converter, and some error correction logic. Input voltage-type signals are converted to time-difference signals by a voltage-to-time-difference converter. Its rising- and falling-edge outputs contain delay information; they can then be converted by two time-to-digital converters operating at interleaving clock phases. Because of the transparent delayed signal without a sample-and-hold circuit, the subsequent time-to-digital converter structure is of the flash type. By using a distinct RC time constant of the time comparator, the time-difference signals can be converted to the relevant 1-of-n code. Because this conversion is almost entirely digital in nature, little static current is consumed. The measured signal to noise and distortion ratio and spurious-free dynamic range of the ADC are 26.1 dB and 31.5 dB, respectively, at a 400-MHz sampling frequency for a 100-MHz input signal.
SDGs
Type
journal article