Dual Mode Viterbi/Turbo-Code Decoder
Date Issued
2011
Date
2011
Author(s)
Wu, Jung-Hsuan
Abstract
The next-generation communication system, long term evolution (LTE), is currently the most popular mobile wireless technology in the market. LTE allows wireless service providers to improve the economics of deploying mobile broadband networks. The performance of LTE is better than the today’s 3G or 3.5G wireless network. LTE has already been the new standard of a next-generation communication system announced by the third generation partnership project (3GPP). Compared to the 3G and 3.5G communication systems, the obvious advantage of LTE is its high data rate.
In order to provide high data rate transmission, a parallelized architecture of channel decoder is needed for hardware implementation. However, a highly parallelized architecture will require large power consumption and chip area. So we will use some low power architectures to reduce the memory usage for having a smaller chip area and consuming lower power. Besides, we also use the hardware reused technique to increase the area efficiency. According to the ideas above, we propose a dual mode Viterbi/turbo- code decoder to reduce the power dissipation and area.
In this Thesis, we will introduce the channel coding in a communication system briefly first. Then, we explain the decoding algorithms for the convolutional code and turbo-code. And the proposed low power architecture and hardware sharing are described. Finally, the implementation flow and result are depicted.
Subjects
Turbo Code
Viterbi
Type
thesis
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