A 45.6-GHz matrix distributed amplifier in 0.18-/spl mu/m CMOS
Resource
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Journal
Custom Integrated Circuits Conference, 2005
Pages
-
Date Issued
2005-09
Date
2005-09
Author(s)
DOI
N/A
Abstract
This paper presents a fully integrated matrix distributed amplifier fabricated in a standard 0.18-/spl mu/m CMOS process. With periodically loaded coplanar waveguides (CPW) as the synthetic transmission lines and cascode amplifiers as the gain cells, the 2/spl times/4 matrix amplifier is proposed to achieve a high gain over an extended frequency band. The fabricated circuit exhibits a gain of 6.7 dB with a 3-dB bandwidth of 45.6 GHz. Both input and output return losses are better than 10 dB within the entire frequency range. The chip size of the matrix amplifier is 1.8/spl times/1.05 mm/sup 2/ including the testing pads.
SDGs
Type
journal article
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