A parallel computer for lattice gauge theories
Journal
3rd Conference on Hypercube Concurrent Computers and Applications: Architecture, Software, Computer Systems, and General Issues
Journal Volume
1
Pages
81-91
Date Issued
1988
Author(s)
Abstract
A parallel computer especially designed for the calculations in lattice gauge theories is proposed. The final device will contain 256 nodes running in MIMD mode with a computational power about one billion 32-bit floating point operations per second. Each node is controlled by the Motorola 68020/68882 microprocessors, (the Weitek floating-point processors ) and two megabyte static RAM. The architecture is designed to allow rapid execution of the numerically intensive calculations in lattice gauge theories. In this paper, we outline the hardware and software design of the first four nodes which have been built and tested.
SDGs
Type
conference paper