A coded block adaptive neural network structure for pattern recognition VLSI
Resource
VLSI Technology, Systems, and Applications, 1991. Proceedings of Technical Papers, 1991 International Symposium on
Journal
1991 International Symposium on VLSI Technology, Systems, and Applications
Pages
-
Date Issued
1991-05
Date
1991-05
Author(s)
Kuo, J.B.
Chen, Y.K.
Lu, Y.H.
Mao, W.C.
DOI
N/A
Abstract
A coded block adaptive neural network structure with a Hamming-Error-Correction-Technique (HECT), which can be used to greatly enhance the VLSI implementation capability of the block system using a parallel processor architecture is presented. According to simulation results, the coded block system with HECT provides a shorter learning time, and a better reconfigurability and an order-of-magnitude more efficient VLSI implementation capability.>
Type
journal article
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