A High-Throughput and General-Distribution Pattern Generator for Constrained Random Verification
Date Issued
2014
Date
2014
Author(s)
Wu, Bo-Han
Abstract
Nowadays, Constrained Random Verification (CRV) methodology is becoming the mainstream to verify system-wide properties for the advantage of its scalability and efficiency. Verification engineers implement verification scenario by writing constraints instead of explicitly specifying simulation patterns. A constraint solver is then applied to solve those constraints and generate feasible stimuli to exercise the design. To assure that the majority of the verification efforts are spent on the simulation of the design and the validation of the assertions/monitors, it is required that the pattern generation process should be computationally inexpensive and thus only consume a small fraction of the computing resource. On the other hand, to ensure the best verification quality, it is specified in the VDL manual that the distribution of the generated stimuli should be even or meet the user-specified distribution.
In this dissertation, we propose a constrained pattern generation technique which is called “Range-Splitting and Solution-Density Estimation (RSSDE)” to accelerate the pattern generation processes. We focus on conquering three practical challenges: 1) the tradeoff between pattern generation speed and distribution requirement 2) testbench with solving-order constraints 3) testbench with multiple constraint sets. The above three issues frequently appear in real verification environment like UVM and VVM. Furthermore, we guarantee that the generated patterns satisfy the distribution requirement with the benefits of pattern generation acceleration. The experimental results demonstrate the robustness and efficiency of our framework when compared to a commercial tool.
Subjects
功能性驗證
CRV
SystemVerilog
樣式分布
限制求解
Type
thesis
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