A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming
Resource
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Journal
IEEE International Symposium on Circuits and Systems
Pages
565-568
Date Issued
2006-05
Date
2006-05
Author(s)
DOI
N/A
Abstract
A 2nd-order curvature-compensated CMOS bandgap reference circuit with a novel trimming technique is described. The 2nd-order curvature compensation is implemented by using a temperature-dependent resistor ratio generated by a poly resistor and a diffusion resistor. A trimming technique with digital switches is utilized to increase or decrease resistance bi-directionally and therefore to minimize the variance of resistance. The proposed voltage reference operates down to a 1.5 V supply and consumes a maximum supply current of 55 /spl mu/A. The experimental prototype circuit in a standard 0.35-/spl mu/m CMOS process achieves a temperature coefficient of 10 ppm//spl deg/C and occupies an area of 0.71 mm/sup 2/.
SDGs
Type
conference paper
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