A high-speed 1.5 V clocked BiCMOS latch for BiCMOS dynamic pipelined digital logic VLSI systems

Resource

ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International

Journal

ASIC Conference and Exhibit, 1995.

Pages

-

Date Issued

1995-09

Date

1995-09

Author(s)

Kuo, J.B.

Lou, J.H.

Su, K.W.

DOI

DOI

N/A

URI

Type

journal article

File(s)

Name

00580739.pdf

Size

201.76 KB

Format

Adobe PDF

Checksum

(MD5):c03e578db0832ee7beed720c18c7d772