Design and VLSI implementation of MPEG audio decoder
Resource
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers., 1995 International Symposium on
Journal
International Symposium on VLSI Technology, Systems, and Applications, Proceedings
Pages
206 - 210
Date Issued
1995-06
Date
1995-06
Author(s)
DOI
N/A
Abstract
The paper presents a chip design for MPEG audio decoder, with a new modified scheme. In the modified decoding scheme, the required computations can be reduced into half of the original one, and the storage demand too, i.e., the pseudo-QMF, a polyphase filter bank, only requires 512 words memory for 1024 points. The major operators include one adder-subtractor and one multiplier-accumulator. The chip is achieved by using the structure silicon compiler in the Genesil system, with 0.8-μm CMOS technology.
Event(s)
Proceedings of the 1995 International Symposium on VLSI Technology, Systems, and Applications
SDGs
Other Subjects
Algorithms; Computational methods; Computer architecture; Data compression; Data storage equipment; Decoding; Electric filters; Frequency domain analysis; Integrated circuit layout; Pipeline processing systems; Signal encoding; VLSI circuits; Audio decoder; Decoding algorithm; Silicon compiler; Audio equipment
Type
conference paper
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