A Miller Divider Based Clock Generator for MBOA-UWB Application
Journal
IEEE Symposium on VLSI Circuits
Pages
34-37
Date Issued
2005-06
Author(s)
Y. C. Huang
Abstract
A Miller divider based clock generator is proposed for multi-band OFDM alliance (MBOA) ultrawideband (UWB) application. Employing closed-loop operation, the clock generator can produce three difference carrier frequencies with negligible in-band spurs while achieving less than 9.5-ns settling time. A transistor-sizing optimization technique for active inductors with a current-reusing technique is used to achieve low-power operation and area saving. Fabricated in a 0.18-/spl mu/m technology, the clock generator only dissipates less than 22 mW from a 1.8-V power supply.
SDGs
Type
conference paper