Design of Automatic Gain Control Amplifiers and Analog to Digital Data Converters for Receiver Applications

This thesis describes the design of automatic-gain-control amplifiers and the following analog-to-digital data converters using CMOS process technologies. With the progress of semiconductor process and the development of digital signal process technique, the function and the performance of digital circuits become more and more strong. However, real-world signals are analog. When signals are transmitted, signal strengths are different due to different environments and interferences so that they could not be used in digital circuits. Therefore, providing stable signal strength and converting analog signal as digital output data in receivers is indispensable in all kinds of integrated circuits.irst, this thesis introduces basic fundamentals of automatic-gain-control amplifier and two of our experimented automatic-gain-control amplifiers. By our proposed methods, variable-gain amplifiers which have the characteristic of exponential gain amplifiers so that automatic-gain-control amplifiers have constant settling time and their data rates achieve 5Gb/sec and 1.25Gb/sec, respectively. Second, track-and-hold circuits for high-speed analog-to-digital data converter are presented. When sampling an analog signal, many parasitic effects degrade the performance of the circuit. To deal with these problems, two track-and-hold circuits are proposed by using the differential cancellation method to cancel these effects. According to experimental results, the track-and-hold circuits achieve 5-bit 10GSamples/sec and 4-bit 13.5GSamples/sec. respectively. In the flash analog-to-digital data converters, modified architecture and some techniques are adopted to improve performances of bandwidth and circuit.n advance nanoscale CMOS process, transistor has two features of high operation speed and low supply voltage. The low supply voltage makes analog circuits design becomes more and more difficult. The time-domain design methodology which transfers the analog voltage into time-domain signal for data conversion is proposed. An 8-bit 20MSamples/sec integrating analog-to-digital data converter with resolution variable is experimented and discussed. Finally, a time-domain flash analog-to-digital data converter is also designed and implemented in 65-nm CMOS process. According to simulation results, it achieves resolution of 6-bit at 500MSamples/sec.