A V-band power amplifier with transformer combining and neutralization technique in 40-nm CMOS
Journal
IEEE International Symposium of Radio Frequency Integrated Technology
Date Issued
2017
Author(s)
Abstract
A V-band transformer-base power amplifier (PA) is implemented in 40nm CMOS. It is a three-stage PA with eight-way transformer combining at output stage. This PA uses the transformers with dc path of metal-one and neutralization technique to improve the passive loss and asymmetric problem, as well as the gain and stability. The PA achieves a measured saturated output power (P sat ) of 19.8 dBm with 18.3% peak power-added efficiencies (PAE) at 60 GHz. The peak gain is 25.5 dB at 54.5 GHz with a 3-dB bandwidth of 11.4 GHz from 51 to 62.4 GHz.
SDGs
Type
conference paper