Thermal-driven interconnect optimization by simultaneous gate and wire sizing

Journal

2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006

Pages

151-154

Date Issued

2007

Author(s)

Lin, Y.-W.

DOI

10.1109/VDAT.2006.258147

URI

http://www.scopus.com/inward/record.url?eid=2-s2.0-34748883055&partnerID=MN8TOARS

http://scholars.lib.ntu.edu.tw/handle/123456789/332265

Type

conference paper