Novel method to investigate the critical depth of cut of ground silicon wafer
Journal
Journal of Materials Processing Technology
Journal Volume
182
Journal Issue
1-3
Pages
157-162
Date Issued
2007
Author(s)
Abstract
Ductile regime grinding of silicon wafer has advantages such as smooth surface roughness (Ra < 10 nm) and minimum subsurface damage layer (<10 μm). With ductile regime grinding, the subsequent processes such as etching and rough polishing processes can be minimized in the production of silicon wafer. To achieve ductile regime grinding, a fundamental concept is the application of grain depth of cut being less than the critical cut depth, dc, of the silicon wafer. The objective of this paper is to derive, and to investigate by experiment, the dc value for silicon wafer grinding. Following these key steps, the effects of dc on various major grinding parameters are studied. © 2006 Elsevier B.V. All rights reserved.
Type
journal article