Improvement of Power and Signal Integrity through Layer Assignment in High-Speed Memory Systems
Journal
2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2019
Date Issued
2019
Author(s)
Abstract
In high-speed systems, large switching current drawn from power supply seriously degrades the system performance. This paper discloses a signal integrity (SI) issue related to power integrity (PI). A high-speed memory subsystem is used to evaluate the impact of switching current on SI using eye diagrams. Several test cases are studied to clarify the signal susceptibility from the voltage variation of power due to switching current. Full-wave and circuit simulations are used to validate the hypothesis of noise immunity.
SDGs
Type
conference paper