Design and Implementation of a High-Speed Analog Adaptive Equalizer
Date Issued
2007
Date
2007
Author(s)
Lin, Jui-Chieh
DOI
en-US
Abstract
Nowadays, data transmission operates at a very high speed. However as the transmission data rate becomes higher, the signal suffers from more severe frequency dependent magnitude loss due to the channel limited bandwidth. Analog adaptive equalizer has been proven of great use to compensate the non-ideality. Along with the adaptability, analog equalizer is capable of giving adequate boosting to time and temperature varying channel loss. In the Thesis, an analog filter fabricated in TSMC 0.18μm 1P6M CMOS technology is designed. MOS varactor and transistor in triode region acts as variable resistor is applied for adaptability.
Subjects
等化器
類比等化器
連續時間濾波器
接收器
equalizers
adaptive equalizers
continuous time filters
receiver
Type
thesis
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