Tile-based power planning during floorplanning
Journal
IEEE International SOC Conference, SOCC 2003
Pages
195-198
Date Issued
2003
Author(s)
Fang, J.P.
Abstract
In this paper, we introduce a tile-based approach to power planning at the stage of floorplanning. For a given floorplan solution, an associated tile graph of power density is generated, and the temperature of the floorplan is evaluated tile by tile. In contrast to the direct evaluation from the power consumption of circuit blocks and neglecting the effect of heat diffusion, we take the effect of heat diffusion in a die into consideration. Also, we simplify the computing of temperature by way of a tile graph, which make the heat estimation and thus the power planning in the floorplanning stage possible. © 2003 IEEE.
Subjects
Bismuth; Circuits; Clocks; Energy consumption; Piecewise linear approximation; Power engineering and energy; Power generation; Temperature; Tiles; Very large scale integration
SDGs
Other Subjects
Bismuth; Clocks; Energy utilization; Networks (circuits); Power generation; Temperature; Tile; VLSI circuits; Circuit blocks; Direct evaluations; Floor-planning; Heat diffusions; Piecewise linear approximations; Power densities; Power engineering and energies; Power planning; Piecewise linear techniques
Type
conference paper
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