Role of ${\\hbox{HfO}} _{2} $/${\\hbox{SiO}}_{2}$ Gate Dielectric on the Reduction of Low-Frequent Noise and the Enhancement of a-IGZO TFT Electrical Performance
Journal
Journal of Display Technology
Journal Volume
8
Journal Issue
12
Pages
695--698
Date Issued
2012
Author(s)
Abstract
High-κ dielectric is regarded as an effective material to reduce the operating voltage of the amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs). However, the dielectric with high permittivity often has the drawbacks of inducing small conduction band offset energy and high interface trap density. Here a bilayer HfO 2 /SiO 2 gate dielectric for thin-film transistors (TFTs) is employed to address the issues. Compare to the a-IGZO TFT with solely 15 nm-thick HfO 2 gate dielectric, the TFT with the bilayer HfO 2 /SiO 2 (10 nm/5 nm) gate dielectric improves the subthreshold swing (SS) from 0.22 to 0.12 V/decade, the mobility from 1.4 to 7 cm 2 /V·s and current on-off ratio from 9×10 6 to 1.3×10 9 . Finally, Hooge's parameters (extracted from the low-frequency noise measurement) of a-IGZO TFTs were investigated to understand the defects near the channel/dielectrics interface so that the role of the thin SiO 2 layer can be verified. The device with bilayer HfO 2 /SiO 2 structure exhibits a value of 2×10 -3 , which is an order of magnitude lower than the one with a single HfO 2 layer. The Hooge's parameter of our bilayer dielectric is the lowest among the reported metal-oxide based TFTs on the glass substrate.
SDGs
Type
journal article