Divide-by-three injection-locked frequency dividers over 200 GHz in 40-nm CMOS
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
48
Journal Issue
2
Pages
405-416
Date Issued
2013-02
Author(s)
Pin-Hao Feng
Abstract
Four divide-by-3 injection-locked frequency dividers (ILFDs) are fabricated in 40-nm CMOS technology. A second-harmonic peaking technique is used to enhance the locking range. The distributed inductor technique is used to enhance the operation frequency and the locking range. The locking range and design considerations of the proposed ILFDs are discussed. The largest measured locking range among four ILFDs is 236.6~245.2 GHz. The highest operation frequency is over 280 GHz. These ILFDs consume 2.97~3.96 mW from a supply of 1.1 V excluding output buffers.
SDGs
Type
journal article