Demonstration of CMOS Integration With High-Voltage Double-Implanted MOS in 4H-SiC
Journal
IEEE Electron Device Letters
Journal Volume
42
Journal Issue
1
Start Page
78
End Page
81
ISSN
0741-3106
1558-0563
Date Issued
2021-01
Author(s)
DOI
10.1109/LED.2020.3038179
Abstract
In this work, we demonstrate CMOS integration that is fully compatible with a commercial double-implanted MOS (DMOS) process in 4H-SiC without requiring additional masks and cost. The characteristics of the NMOS, the PMOS, the CMOS inverter, and the ring oscillators are measured up to 175 °C. Propagation delay is reduced from 117 ns at room temperature to 17.8 ns at 175 °C, thanks to the increased current capability of both the NMOS and the PMOS. The body effect from the high substrate voltage on the PMOS is also investigated. The characteristics of the PMOS and the CMOS inverter are measured for a substrate voltage up to 800 V. The propagation delay for the ring oscillator is also measured when the substrate voltage is 300 V.
Subjects
CMOS
DMOS
inverter
ring oscillator
SiC
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Type
journal article