5.7 GHz low-power variable-gain LNA in 0.18 μm CMOS
Resource
Electronics Letters
Journal
Electronics Letters
Journal Volume
41
Journal Issue
2
Pages
66-68
Date Issued
2005-01
Date
2005-01
Author(s)
Wang, Y.S.
DOI
0013-5194
Abstract
A variable-gain low-noise amplifier (LNA) suitable for low-voltage and low-power operation is designed and implemented in a standard 0.18 μm CMOS technology. With a current-reused topology, the common-source gain stages are stacked for minimum power dissipation while achieving high small-signal gain. The fully integrated 5.7 GHz LNA exhibits 16.4 dB gain, 3.5 dB noise figure and 8 dB gain tuning range with good input and output return losses. The LNA consumes 3.2 mW DC power from a supply voltage of 1 V A gain/power quotient of 5.12 dB/mW is achieved in this work.
SDGs
Other Subjects
CMOS integrated circuits; Electric impedance; Energy dissipation; Energy utilization; Gain control; MOSFET devices; Resonance; Signal processing; Spurious signal noise; Topology; Tuning; Low-noise amplifier (LNA); Low-power operation; Power quotient; Small-signal gain; Amplifiers (electronic)
Type
journal article
File(s)![Thumbnail Image]()
Loading...
Name
01393475.pdf
Size
453.86 KB
Format
Adobe PDF
Checksum
(MD5):8ab6b41491939f57c02e1d40258b622b