BEOL Layout Optimization to Improve RF Performance of 40nm Node Technology for High-Frequency Applications
Journal
2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)
Date Issued
2024-04-22
Author(s)
Abstract
RF performance considering different transistor array layouts is studied and optimized by validated TCAD simulation. A Hybrid-Contact layout scheme is proposed to improve RF performance by reducing the gate parasitic capacitance and resistance from the interconnects. Optimizing the gate contacts and source-to-drain interconnection lines, the proposed layout improves maximum oscillation frequency up to 699 GHz without the cut-off frequency degradation as compared to the original Double Side Gate Contact layout.
Event(s)
2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA
SDGs
Publisher
IEEE
Type
conference paper