Research of CMOS RF Power Amplifier with Power Efficiency Improvement
Date Issued
2016
Date
2016
Author(s)
Nai, JI-Kang
Abstract
In this thesis, the theory of switchmode power amplifier (PA) is implemented in the design of CMOS RF power amplifier. The aim of the design is to improve the efficiency of power amplifier while keeping high out output power. A 5 GHz class-F-1 mode power amplifier based on transformer using the TSMC 180-nm CMOS process is presented first. In this design, the conventional output matching networks of LC-tank are replaced by the transformer with a shunt capacitor to increase the power density. The measured result shows 13.2-dB small signal gain, and 25.4-dBm saturation power (Psat) and 41% peak power added efficiency (PAE). While the output power at 1-dB compression point (OP1dB) is 24.6 dBm, and the PAE at OP1dB is 35%. Then a power amplifier works from 2.8 to 6 GHz is also designed using 180-nm CMOS process. The output matching network of the proposed PA achieves wideband fundamental matching and 2nd and 3rd harmonic impedance matching to improve the efficiency simultaneously. The measured result shows 10.4-to-13.4-dB small signal gain, and 20.8-to-22.1-dBm Psat, and 37-44% peak PAE. In the meanwhile the OP1dB is 20.3-21.4 dBm, and the PAE at OP1dB is 32-38%.
Subjects
Power amplifier
CMOS
switchmode power amplifier
high efficiency
class-F-1 mode power amplifier
Type
thesis