60-GHz Phased Array System for Wireless Communications
Date Issued
2012
Date
2012
Author(s)
Kuo, Jing-Lin
Abstract
The 60-GHz 4-element phased-array transmit/receive (TX/RX) system-in-package (SiP) antenna modules in 65nm CMOS technology are presented. The design is based on the all-RF architecture with power amplifier (PA), variable gain low noise amplifier (VGLNA), 4:1 Wilkinson power combining/ dividing (PC/PD) network, 4-bits RF switching type phase shifters (STPS), phase compensated variable gain amplifier (VGA), digital control interface (DCI), 6-bits unary digital-to-analog converter (DAC), electrostatic discharge (ESD) protection, and bias circuit. The 2x2 TX/RX phased arrays have been packaged with 4 antennas in a low temperature co-fired ceramic (LTCC) module. The 60-GHz SiP module packaging technology has also been developed. The Tx/Rx ICs are bonded onto low temperature co-fired ceramic substrates through flip-chip bonding and underfill process, which can be assembled onto printed circuit boards with bond wires or solder balls for further usage. Electrical characteristics of the RF signal traces from IC to antenna array are investigated to lower the transmission loss. The antenna array is designed on the other side opposite to the flipped chip side, by using the backed cavity to achieve more than 20% bandwidth and high isolation. The mutual coupling of antenna elements is reduced by incorporating the via-based corrugation between antenna elements and the interleaved topology for the array layout. The measured couplings of adjacent elements were below -15 dB.
The entire 2x2 beam steering functions are digitally controllable, and the individual registers are integrated at each front-end to enable beam steering through the DCI. The four-element TX array results in an output P1dB of 5 dBm per channel. The four-element RX array results in an average gain of 25 dB per channel. The four-element array consumes 400 mW in the TX from 1-V supply voltage and 180 mW in the RX from 1.8-V and 1-V supply voltage, and occupies an area of 3.74 mm2 in TX IC and 4.18 mm2 in RX IC. Good agreement between simulated and measured array pattern is demonstrated. To the author’s knowledge, this is the first demonstration of on-wafer V-band phased array system pattern measurement without the up/down converter.
The entire 2x2 beam steering functions are digitally controllable, and the individual registers are integrated at each front-end to enable beam steering through the DCI. The four-element TX array results in an output P1dB of 5 dBm per channel. The four-element RX array results in an average gain of 25 dB per channel. The four-element array consumes 400 mW in the TX from 1-V supply voltage and 180 mW in the RX from 1.8-V and 1-V supply voltage, and occupies an area of 3.74 mm2 in TX IC and 4.18 mm2 in RX IC. Good agreement between simulated and measured array pattern is demonstrated. To the author’s knowledge, this is the first demonstration of on-wafer V-band phased array system pattern measurement without the up/down converter.
Subjects
CMOS
phased array
V-band
system-in-package (SiP)
beamforming
transmitter
receiver
flip-chip
wireless communication.
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-101-D97942006-1.pdf
Size
23.32 KB
Format
Adobe PDF
Checksum
(MD5):e5689549961118e635aea0a07d0ea37d