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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Hardware-Efficient Two-Stage Saliency Detection
Details
Hardware-Efficient Two-Stage Saliency Detection
Journal
IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Journal Volume
2018-October
Pages
205-210
Date Issued
2018
Author(s)
Wu, S.-Y.
Lin, Y.-S.
Tu, W.-C.
SHAO-YI CHIEN
DOI
10.1109/SiPS.2018.8598418
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/502350
URL
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85061394179&doi=10.1109%2fSiPS.2018.8598418&partnerID=40&md5=245d846fc9f0b74ad55da07c3f34546c
Type
conference paper