10位元 250MSample/s 內插式數位類比轉換器
10 Bit 250MSample/s Interpolation Digital to Analog Converter
Date Issued
2005
Date
2005
Author(s)
Kuo, Han-Sung
DOI
zh-TW
Abstract
The requirements on today’s wireless communications equipment are very hard. Most of the signal processing is done in the digital domain, but the information has to be transferred with analog signals, and therefore analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) are crucial building blocks.
In this thesis, a 10-bit 250MSample/s current-steering DAC is presented for 802.11a transceiver, with interpolation function for frequency domain applications. For 802.11a transceiver standard, the channel bandwidth is 20MHz. Thus the input bandwidth of DAC can be defined 20MHz. 64 QAM which be used modulation has to need 8~10 bit. So, the input bit number is defined 10 bit to increate the resolution.
Using interpolation function is to release the specification of filter in the transceiver. The special technique of layout and circuit of switch current source are employed to improve the performances and size of the current source matrix. Deglitch circuit is used to eliminate the digital data asynchronous effects. In order to increate accuracy of the DAC, nonlinearity and linearity effects can be estimated before to tape out the chip.
This interpolation DAC uses mix mode 0.35μm CMOS technology and power consumption is 60.2mW. The die area is 2.25mm2.
Subjects
發射機
防突波
濾波器
內插
Transceiver Interpolation 64QAM Deglitch
Type
thesis
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