A Low-Power Digit-Based Reconfigurable FIR Filter
Resource
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 53, NO. 8, AUGUST 2006
Journal
IEEE Circuits and Systems II
Journal Volume
53
Journal Issue
8
Pages
617-621
Date Issued
2006-08
Author(s)
K. H. Chen
Abstract
In this brief, we present a digit-reconfigurable finite-impulse response (FIR) filter architecture with a very fine granularity. It provides a flexible yet compact and low-power solution to FIR filters with a wide range of precision and tap length. Based on the proposed architecture, an 8-digit reconfigurable FIR filter chip is implemented in a single-poly quadruple-metal 0.35- CMOS technology. Measurement results show that the fabricated chip operates up to 86 MHz when the filter draws 16.5 mW of power from a 2.5-V power supply.
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Type
journal article
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