A Fractional-N Frequency Synthesizer with a Sigma-Delta Modulator for Polar Transmitter
Date Issued
2004
Date
2004
Author(s)
Chao, Kuo-Hao
DOI
en-US
Abstract
在較先進手機通訊標準中，調變信號的振幅並不是定值，所以對手機發射端的必v放大器來說，要對線性度和必v做出取捨。極座標發射機對於實現多傳輸標準和提升發射機必v有相當大的潛力。極座標發射機其中一主要部分為相位調變器。在我的研究中，建立了一套使用Simulink的相位調變器行為模型。評估極座標發射機的EVM、頻譜和對於相位和振幅信號不同步所造成的影響。最後使用一個三角積分調變除小數頻率合成器來實現部分相位調變器的射頻電路。其中相位頻率比較器、電流泵和多模數除頻器是用0.35μm混和信號CMOS製程的積體電路實現, 而三角積分調變器是用FPGA實現。
In 2.5G or 3G communication system, the envelope of the modulation signal is non-constant, so it is a trade-off between the linearity and the efficiency of a power amplifier in the transmitter. Polar transmission techniques offer the capability of multi-standard and the potential for significant efficiency gains over solutions based on I/Q modulation. A main component of a polar transmitter is the phase modulator. In the work, we setup a complete behavior model of phase modulator in Simulink environment. The EVM and the power spectrum are estimated, and the effect of delay mismatch between the phase and envelope signal is also discussed. Finally, we use a Σ-Δ fractional-N frequency synthesizer to implement partial RF circuit of the phase modulator. A phase frequency detector, a charge pump and a multi-modulus divider are fabricated with 0.35μm 2p4m CMOS technology and are operated over 1 GHz. The Σ-Δ modulator is implemented by FPGA.
Subjects
極座標發射機
鎖相迴路
頻率合成器
frequency synthesizer
PLL
polar transmitter
Type
thesis
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