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  4. A System Design Methodology for Concurrency from UML to SystemC
 
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A System Design Methodology for Concurrency from UML to SystemC

Date Issued
2007
Date
2007
Author(s)
Lin, Chi-Wei
DOI
en-US
URI
http://ntur.lib.ntu.edu.tw//handle/246246/52991
Abstract
Increasing demands for more performance have taken the system designs based on VLSI chips to their limits. The design bottleneck now is the interconnect delays and power consumptions rather than the basic gate delays. One way to eliminate the latency and power consumptions of accessing data external to the chip is putting all the various VLSI components into a single chip. It leads to the design paradigm of System-On-Chip (SOC), in which all the functionality of a complete system is put into a single silicon die, including both the software and hardware components. As the process of SOC design is getting more and more complicated, raising the abstraction layer can help system designers focus on the essential elements of the design. Since the SystemC language has already provided several layers of abstraction, systems to be constructed can initially be designed in the software-based un-timed functional models and further be refined to lower abstraction level to get the more detailed design. However, by the assistance of the United Modeling Language (UML), which is commonly used in designing software systems, the highest level of abstraction provided in SystemC can even be raised. Based on the idea of raising the abstraction level of the SystemC language by the UML, a methodology for system level design is proposed to realize the designing process for concurrency: An UML profile that catches the hardware-oriented characteristics of SystemC is constructed in the thesis, which is implemented subsequently on the chosen Computer Aided Software Engineering (CASE) tools ‘Enterprise Architect’ and ‘Microsoft Visual Studio .NET 2003’. System-On-Chip (SOC) designs can thus be built based upon the constructed UML profile for SystemC and the source codes of SystemC can be generated automatically through the templates for code generation. Two case studies that both have concurrent behaviors are given in the last to illustrate the proposed process of SOC design, simple verifications and simulations are carried out as well.
Subjects
單晶片系統
統一塑模語言
軟硬體協同設計
同作行為
電腦輔助軟體工程
Computer Aided Software Engineering (CASE)
Concurrency
SW/HW Codesign
SystemC
System-On-Chip (SOC)
Unified Modeling Language (UML)
Type
thesis
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ntu-96-P94921007-1.pdf

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