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  4. Design and Implementation of an Ultra-wideband Baseband Transceiver
 
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Design and Implementation of an Ultra-wideband Baseband Transceiver

Date Issued
2004
Date
2004
Author(s)
Yang, Chia-Hsiang
DOI
zh-TW
URI
http://ntur.lib.ntu.edu.tw//handle/246246/57453
Abstract
In this work, we propose a low-complexity transceiver architecture for impulse-radio ultra-wideband (UWB) communication that focuses on short range, low power applications such as radio frequency identification (RF-ID) and sensor network. Since power and cost are the main design issues, hardware simplicity is taken into account early in the design stage. A physical-layer packet format made up of regular preamble, coded preamble and data is proposed to facilitate receiver design. In the regular preamble stage, a bank of correlators and a peak searcher are responsible for finding the exact pulse position within a pulse repetition interval. During the coded preamble stage, a Golay code matched filter and a symbol boundary detector work together to search for the symbol boundary. Finally, a data recovery block recovers the data using a correlator. In addition, the receiver includes an early-late timing tracking loop that can overcome timing offset between the receiver clock and the received signal. Simulation results show that the transceiver functions as expected in realistic multipath channels. Several low-power techniques from architectural level to circuit level have been applied in circuit design. The final receiver chip is designed in a 0.18 um CMOS process and its die size is about 1.6 x 1.7 mm2. Post-layout simulation shows that the receiver chip’s core power consumption is 13mW when it operates at 62.5MHz clock rate from a 1.8-V supply voltage.
Subjects
超寬頻
編碼封包前端
時序飄移
脈波式
符元邊界
規律封包前端
Golay碼
regular preamble
ultra-wideband
timing offset
Golay code
impulse-radio
symbol boundary
coded preamble
Type
thesis
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ntu-93-R91943002-1.pdf

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