Design of Image-Reject CMOS Low-Noise Amplifiers with Novel Input-Matching Techniques
Date Issued
2005
Date
2005
Author(s)
Sun, Ming-Chang
DOI
en-US
Abstract
The design of radio frequency (RF) circuits using CMOS technology has gained many focuses in recent years. Many fantastic design techniques have been published in many literatures. Low noise amplifier (LNA) is one of the well-studied building block for RF circuits. However, the basic problem of input matching have been oversimplified or sometimes even ignored by common assumption. This makes the design of a high frequency LNA be time-consuming. In this dissertation, the difficulty of the input matching for cascode CMOS LNA is explored and a design methodology is proposed to achieve input matching in an explicit approach. In addition to the input matching problem, another design goal is the integration of image-reject (IR) filter for superheterodyne transceivers since the external band-pass filter prevents further integration for RF circuits.
A new design technique for image-reject CMOS low-noise amplifiers (LNAs) is presented in this dissertation. In addition to the proposed input matching method, a passive notch filter with high image-reject ability is analyzed. This improved design technique uses a 4th-order symmetric T-coil notch filter to achieve image-reject function. Current reuse technique is adapted in the proposed technique to save power and to boost power gain. A 2.4 GHz image-reject LNA is designed with TSMC 0.18 μm CMOS process to demonstrate the potentially high image-reject ability of the proposed architecture. Simulation results using available foundry models show about 32 dB image rejection at 1.7 GHz. The power gain of the design is 19 dB and the total power consumption is about 4.6 mW at 1.5 V power supply.
Subjects
輸入阻抗匹配
鏡像訊號消除
點拒濾波器
雜訊指標
input-matching
image-reject
notch filter
Noise Figure
Type
thesis
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