Microcontroller Design for Wireless Sensor Network
Date Issued
2009
Date
2009
Author(s)
Yeh, Kai-Wen
Abstract
Distance medical treatment will become an important issue in upcoming ageingociety. As a result of the advancement of semiconductor manufacturing technology, its possible to integrate wireless transceiver, sensors, amplifier and digital controller intone single chip. This is called a SOC (System‐on‐Chip) chip. Hardware cost and size of aSN (Wireless Sensor Network) sensor node can be reduced substantially using SOCechnology and suitable for distance medical treatment.e achieved a SOC chip for WSN sensor node using TSMC 0.35 μm Mixed‐signalP4M CMOS technology. It is composed of a microcontroller, an ADC (analog‐to‐digitalonvertor), an Instrument Amplifier, a trans‐impedance amplifier, an analog multiplexer, ASK transmitter, an OOK receiver, 5 regulators, a crystal oscillator and power‐on‐resetircuit. Size of the SOC chip including 117 ESD PADs is 3298*3637μm^2he microcontroller is fully compatible with common 8051 MCUs. It has 111nstructions. The core of the microcontroller is pipeline architecture with 5‐stages. Annstruction can be executed in only one clock period. 4096 bytes program memory and56 bytes data memory are embedded. Peripherals such as UART transceivers withardware CRC module, clock‐divider, and timer are also implemented. Maximum clockrequency of the microcontroller is 36MHz (i.e. 18MIPS). Power consumption is.172mA when the chip operates at 4MHz.ower power design is a critical issue for WSN sensor node. Clock‐gatingechnique and clock‐multiplexing are used to reduce power dissipation of digitalircuits. Regulators with switches are used to reduce power dissipation of analog andF circuits. Each analog / RF block can be turned on or off separately.
Subjects
Microcontroller
System on Chip
Wireless sensor network
Low power design
Pipeline
Type
thesis
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