Realizable Reduction for Electromagnetically Coupled RLMC Interconnects
Journal
Design, Automation and Test in Europe Conference and Exhibition (DATE)
Date Issued
2004-02
Author(s)
Rong Jiang
Abstract
This paper presents a realizable RLMC reduction algorithm for extracted interconnect circuits based on two effective approaches: RL branch reduction and RC/LC node reduction. Our algorithm takes advantage of some structures existing extensively in interconnect circuits and hence has extremely fast execution time. It takes about 8 seconds to reduce a circuit of over 300,000 elements while maintaining 3% error and 75% element reduction ratio.
SDGs
Type
conference paper