Minimizing coupling jitter by buffer resizing for coupled clock networks
Journal
IEEE International Symposium on Circuits and Systems
Journal Volume
5
Pages
V509-V512
Date Issued
2003
Author(s)
Abstract
Crosstalk noise is a crucial factor affecting chip performance in deep submicron technologies. Among all possible crosstalk noise sources, clock is the most common aggressor as well as victim. Crosstalk on clock nets can increase clock jitter, which may degrade significantly the system performance. It is therefore imperative to design clock buffers to reduce the coupling effects. In this paper, we address the crosstalk effect on clock networks. We propose an algorithm to size clock buffers for given buffered clock trees such that the induced clock jitter is minimized. Our experimental results show a significant reduction of clock jitter by sizing the clock buffers without increasing the total area of buffer.
SDGs
Type
conference paper
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