Fine-grained Write Scheduling to Improve PCM Performance under Power Budget Limitation

As a promising candidate for future memory, Phase-Change-Memory (PCM) has several advantages over traditional DRAM, such as high cell density and zero leakage power. In addition to the wear-out problem and longer write latency, PCM also faces power issue with high write power. Prior works ad- dress the power budget limitation that the internal power supply could not sustain programming all the write requests for all banks simultaneously, and we find that this situation even gets worse with enlarged last-level cache line. Though division programming technique is a possible solution, the perfor- mance degradation is still substantial.
In this thesis, we propose fine-grained write scheduling to improve the performance of Phase-Change-Memory under power budget limitation. There are two major problems with division programming of PCM write operation: (1) all the divisions of a write request are scheduled collectively, indicating that the preemption of un-issuable divisions is unfeasible and degrades the performance; (2) divisions are divided statically by bit positions, which is lack of flexibility to manage the power consumption of each divisions at runtime. Based on these observations, we propose two schemes. First, sub-request scheduling enables scheduler to schedule under the granularity of divisions to support the preemption of un-issuable write divisions. Second, dynamic division adjusts the power allocation of each division by shifting the data to be written at runtime. Our experimental results show that these techniques improve the system performance significantly by up to 31%.