VLSI design of clustering analyser using systolic arrays

Resource

Computers and Digital Techniques, IEE Proceedings-

Journal

Computers and Digital Techniques, IEE Proceedings-

Pages

-

Date Issued

1995-05

Date

1995-05

Author(s)

Lai, M.F.

Nakano, M.

Wu, Y.P.

Hsieh, C.H.

DOI

1350-2387

URI

Type

journal article

File(s)

Name

00392513.pdf

Size

500.62 KB

Format

Adobe PDF

Checksum

(MD5):885721ac9b132272a24a632c35a23bd2