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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
Rlc coupling-Aware simulation for on-chip buses and their encoding for delay reduction
Details
Rlc coupling-Aware simulation for on-chip buses and their encoding for delay reduction
Journal
IEEE International Symposium on Circuits and Systems
Pages
4134-4137
Date Issued
2005
Author(s)
Tu, S.-W.
Jou, J.-Y.
YAO-WEN CHANG
DOI
10.1109/ISCAS.2005.1465541
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-33749850567&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/316480
Type
conference paper
