A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-μm CMOS
Journal
IEEE VLSI-DAT
Pages
295-298
Date Issued
2010-04
Author(s)
Abstract
This paper presents a 1-V and low-noise readout front-end for biomedical applications. The key to this low-voltage and low-power operation is the current-mode instrumentation amplifier (CMIA). To reject the DC offset, an active-RC integrator with the subthreshold-biased PMOS as high resistance is included in the CMIA and forms the offset cancellation loop. The nested-chopper technique is applied to reduce the flicker noise and improve the common-mode rejection ratio (CMRR). A proposed third-order G m -C low-pass filter (LPF) is incorporated to remove the modulated noise by the choppers. Furthermore, a digitally programmable gain stage is incorporated to provide adjustable gain range for the readout front-end. The overall readout front-end has a bandwidth of 140 Hz and achieves 125-dB CMRR, 90-dB power-supply rejection ratio (PSRR), and 6-nV/rtHz input-referred noise density. The readout front-end is fabricated in a 0.18-μm CMOS process. Total power consumption is 182 μW from a 1-V supply.
SDGs
Type
conference paper