CMOS oversampling Δ Σ magnetic-to-digital converters
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
36
Journal Issue
10
Pages
1582-1586
Date Issued
2001-10
Author(s)
Abstract
In this paper, two CMOS oversampling delta-sigma (Δ Σ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) Δ Σ modulator. The second one directly uses the MOP to realize a first-order SC Δ Σ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.
SDGs
Type
journal article